One of the most common processor-to-LCD interfaces used in modern devices is MIPI DSI due to its relatively low cost. MIPI (Mobile Industry Processor Interface) is a brainchild of the MIPI alliance consisting of mobile industry leaders like Intel and Samsung. They have developed several interface standards over the years, with DSI being one of them. We have covered the display technology in detail below, so let's dive in to see what it is all about.
What is MIPI DSI and MIPI DSI-2?
The MIPI DSI interface is a versatile, high-speed link between a host processor and a display module. The interface is prevalent in tablets, smartphones, automobiles, etc., and it has low EMI, high performance, and low power data transfer. Also, the interface standard minimizes the pin count to reduce design complexity while maintaining compatibility between different product vendors.
A MIPI DSI port on a Raspberry Pi
Source: Wikimedia Commons
On the other hand, MIPI DSI-2 is a scalable, high-bandwidth link between a host processor and high-resolution displays. It delivers UHD video to support a rich visual experience with a refresh rate of up to 120 fps and 8K+ resolution. DSI-2 achieves these advantages while minimizing cost, power consumption, and complexity across different applications.
In other words, MIPI DSI-2 is newer than DSI, and the primary difference is the higher bandwidth provided by the former. However, both operate on the MIPI D-PHY layer and are only available to MIPI Alliance members. But MIPI DSI-2 also runs on the C-PHY physical layer.
MIPI Communication Levels
MIPI has two communication levels. The interface level handles low-level communication, while the packet layer handles high-level communication. Both can operate in low-speed or high-speed interface level modes.
This level shows the display's speed and power settings, and it has the following modes:
- Low power
- High speed
Each of these modes indicates the beginning and end of the packet-level data. Also, the mode used depends on the capability and architecture of the host processor and display application.
The interface level consists of different states that drive data differently in low-power and high-speed modes. These state codes for low-power and high-speed modes include the following.
State switching on the interface depends on the current state. Therefore, driving the negative or positive data lanes low or high (as specified by the codes) indicates the next state.
This communication level comes into play when sending image data to the DSI display in short 4-byte or long 6-65.451-byte packets. Each type of packet specifies the data, size, and error connection. Short packets are ideal for sending commands with no image data. On the other hand, long commands are perfect for transmitting commands with several data bytes, including a stream of image data.
MIPI DSI Operating Modes
The following are the two DSI communication protocol modes.
This mode sends commands to established display registers. Also, it can operate on high speed or low power while using short or long packets. Since it requires display registers, the command mode can only work on displays with RAM for the frame buffer. It usually runs by sending short packets because display memory or registers require at most two bytes of data.
A display controller with no internal memory must use this mode. It sends a continuous stream of data from the processor to display and operates in high-speed mode only. In video mode, the processor transmits data as real-time pixel streams to the interface display (with continuous refreshing).
Advantages of Using MIPI DSI Communication
- High bandwidth serial interface
- Low energy consumption
- Low EMI (Electromagnetic Interference)
- Uses few pins
- Supports stereoscopic content transmission
- Affordable solution
- Smartwatches & Smart meters
A smart meter
- Virtual/augmented reality headsets
- Video game consoles
An Xbox gaming console
- Mobile device (phone) displays & Embedded displays
- Laptops & Tablets
An embedded display on an embedded Arduino system
MIPI (Mobile Industry Processor Interface) is an open standard for mobile application processors developed by the MIPI alliance. It consists of several interfaces for different modules, which include the following.
CSI (Camera Serial Interface) specifies the high-speed serial interface between a camera module (image sensor) and the host/ application processor. It runs on four data lines max in the D-PHY physical layer, providing 4Gb/s max throughput. However, this layer uses one shared differential clock lane. CSI contains a separate I2C interface for camera control. Additionally, it supports packet transmission to assist in error detection/correction and line management.
MIPI display serial interface is the high-speed link between the host processor and the display module. Like CSI, DSI runs on four data lines with one shared differential line. However, its output is lower than in CSI, hitting 1Gb/s maximum.
Other MIPI Interfaces
Besides CSI and DSI, other MIPI interfaces include DigRF V3 and DigRF V4.
HDMI vs. DSI
Unlike HDMI, DSI displays and display interfaces are purpose-built for specific applications. The two have other differences, as shown in the following table.
An HDMI connector
In summary, MIPI DSI is a reliable serial interface for displays that do not require extremely high resolution above the 8K range with high refresh rates. You better go for DSI-2 for such applications. Nevertheless, the technology is still fast and has several applications in modern devices. Thank you for making it to the end and if you have any questions, feel free to contact us.