Optimizing PCB designs to meet industrial standards reserves a huge place in ensuring the system’s efficiency and life span. One of the major design aspects to be PCB optimized is Power loss. In order to significantly reduce power loss, trace optimization plays a vital role.

  1. PCB Trace Design

A power system in general requires wider PCB traces than logical systems to meet the output power requirement. It is essential to know to have the chart comprising Current Capacity of the PCB at various widths before designing. The most common PCB Clad contains 1 oz copper so the Ampere vs. width per 10°C would be                                    





0.25 1
0.75 2
1.27 3
2.03 4
2.79 5
3.81 6
4.57 7
5.59 8
6.60 9
7.72 10

Fig. 1.1 Ampere Vs width


In order to determine the wide size area of the total scrape able copper trace must be determined using the following formulae

Area= (A/ (k*T) ^b) ^ (1/c)

With the area in hand width can be calculated as

Width= Area / (Thickness [oz]*1.378[mils/oz])



A – Current in amperes

T – Temperature rise

k b and c are constants of corresponding IPC standards


  • There are various online resources to design custom PCB.


  • Practical issue in PCB Trace design

Power surges are common in Power electronics design so in some cases due to load change of inductor collapse the lead may overload if the PCB trace has been designed only to the limits the line may be shorted. This can even cause chain reaction and damage the components on board.

Here are some practical examples to illustrate the outcomes of poor calculations

PCB Trace1

Fig 1.1.1 over current burnout in a PSU’s Primary switch

PCB Trace2

Fig 1.2.1 surge current burnout in DC-DC converter

1.2 Improving the current carrying capacity

In order to improve the current capacity further the silk screen pads could to made wider pre hand before etching and coated with thick solder layer to increase the current carrying capacity by increasing the area. Solder has higher resistance than copper so the volume of solder dump must be high to compensate the resistance.

PCB Trace3

Fig 1.2.1 Solder coating to bypass IC’s Drain

  1. Mutual induction in PCB

One of the major loss/Interference factors apart from resistance power loss is mutual induction. High frequency components with high current flow can produce detectable amount of power transfer. This in turn can cause interference to the system or cause loss of power through radiation.

PCB Trace4

Fig 2.1 Illustration of mutual induction in PCB

In order to minimize this effect following techniques is used

  • Tuning to non-resonance frequency with respect to the distance in between
  • Compensating the oscillation with RC/LC network
  • Providing Galvanic isolation between twoPCB traces


PCB Trace5

Fig 2.2 Illustration of Galvanic isolation









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