Blog  /  JK Flip Flop Truth Table: The Circuit Diagram, its Application, and More!

JK Flip Flop Truth Table: The Circuit Diagram, its Application, and More!

A flip flop system is a digital electronics system that stores data in two stable states. A JK flip flop truth table is one of the many types of flip flops, and it is the most common basic electronic system that is universally used in most appliances.

If you intend to use one of these, it is helpful to learn the correct latching action and what it can do for you. This article explores more on the components required to construct the flip flop and the truth table.

Let's begin!

 

What is a JK Flip Flop Truth Table?

 

A truth table is a standard table that uses input conditions to determine if the cross-coupled outputs of the compound statements are 1 or 0.

This memory element has two inputs which are the J input and the K input. It was named JK as the person who invented it, Jack Kilby.

Another name for this digital system is a Bistable Multivibrator, and this is because it has two stable states, which are 0 and 1. In contrast, the (RS) system has the (reset) and (set) state. The JK memory element is similar to SR as the J behaves as the S and K as the R. Toggling occurs in the circuit if the clock signal time pulse is high from the set state to the reset state.

A Jack Kilby flip flop designs are in two ways. Importantly, we have to modify an S-R working system to construct the JK flip-flop circuit using;

  • a NOR latch
  • a NAND latch.

These are the cross-coupled NOR NAND logic gates.

Free Images - SnappyGoat.com- bestof:...Type Transparent Latch.svg Gate-level  Diagram of a D-type Transparent Latch Own Drawing in Inkscape 0 46  2006-06-17 Inductiveload PD Flip-flops

(Using the NOR latch.)

SOURCE: wiki commons.

Free Images - SnappyGoat.com- bestof:Differential D Latch Symbol.svg en  Differential D Latch Symbol Own Drawn Kstar 2009-09-25 PD Unified Flip-flop  Symbols Flip-flops

(Using the NAND latch.)

SOURCE: wiki commons.

Shown below is the logic symbol of a Jack Kilby flip flop.

Free Images - SnappyGoat.com- bestof:SR (Clocked) Flip-flop Diagram.svg  Gate-level Diagram of a Clocked NAND-gate SR Flip-flop Own Drawing in  Inkscape 0 43 2006-06-17 Inductiveload PD Flip-flops

(Clocked RS flip flop logic diagram).

SOURCE: wiki commons.

This symbol indicates that the JK flip-flop is a primary Nand gate RS flip-flop. It consists of a clock input circuit and the correct input signal.

Additionally, the triangle sign beside the clock inputs indicates that these are edge-triggered devices. Hence flip-flops rather than latches.

  example of complex devices that uses the J-K flip flop

(example of complex devices that use the J-K flip flop.)

 

Required components to Make a JK Flip Flop Circuit

 

Components needed include;

  1. One IC MC74HC73A(dual JK flip-flop)
  2. One LM7805 voltage regulator
  3. Connecting wires
  4. A breadboard.
  5. Four 1k resistors and two 220k resistors
  6. Four tactile switches
  7. One green and red LED bulb.
  8. One 9v battery.

This synchronous system has control inputs that are the buttons J, K, R, and CLK. The two LEDs, Q and LED Q' represent the output signal of these digital systems. The voltage regulator LM7805 receives its default input from the 9V battery. As a result, the related 5v output latch provides the IC's Vcc and pin supply. Consequently, we can view the corresponding active output stage for distinct inputs at D through the LEDs.  

Examples of 9v batteries

(Examples of 9v batteries.)

 

3. Block and Circuit Diagram of the JK Flip Flop

 

Often, we find these digital systems in an integrated IC form because of their versatility. The dynamic logic of the toggle action is an added advantage and explains why we use them in many applications.

Free Images - SnappyGoat.com- bestof:Differential D Latch Symbol.svg en  Differential D Latch Symbol Own Drawn Kstar 2009-09-25 PD Unified Flip-flop  Symbols Flip-flops

(J-K flip-flop electronic circuit)

Free Images - SnappyGoat.com- bestof:SR (Clocked) Flip-flop Diagram.svg  Gate-level Diagram of a Clocked NAND-gate SR Flip-flop Own Drawing in  Inkscape 0 43 2006-06-17 Inductiveload PD Flip-flops

 (J-K flip-flop block diagram)

Source; wiki commons

Notice the Set(S) and Reset(R) inputs of the SR bistable latch from the circuit by J and K inputs. Moreover, the two AND information gates in the (SR) system are now the NAND input gates in the desired J-K flip-flop. Importantly, do not forget the 3rd input connected to the LED outputs, as shown in the diagrams above.

Note that the two inputs of the corresponding flip flop now interlock. Therefore, cross-coupling allows employing the invalid conditions of the system to achieve the toggling action.

You meet the invalid conditions when input values are set to 1. And restricted by the presence of the clock input circuit. Eventually, this makes the JK have four possible active input combinations, which are 1, 0, no change, toggle.

Interruption of J altering the state of (0) of Q' through the bottom NAND gate occurs if the circuit is "set." However, when you "RESET" the course, the top NAND gate interrupts the K input from the 0 locations of Q. We can utilize the LED outputs to manipulate the input because of their difference. Additionally, the J-K toggles the flip flop when existing inputs are set to 1.  

close up photo of an oscilloscope

(close up photo of an oscilloscope)

 

4. JK Flip Flop's Truth Table

 

This table uses the general boolean logic or the binary counter logic.

Clk     J       K         Q         Q'   State
1   0       0           Q         Q' no change
1   0       1           0           1 resets Q to 0
1   1       0           1           0 Sets Q to 1
1   1       1           -           - toggles

The RS Flip Flop system offers numerous advantages. However, it has the following issues when switching:

When we change the set or reset inputs while the enable input is 1, the latching action is wrong.

Importantly, we avoid this circumstance when the set input 'S' and reset input 'R' inputs are both set to 0. Also, these active elements eliminate the desired corresponding Flip Flop's flaws (SR).  

A toggle switch

(A toggle switch)

 

5. Application of J-K Flip-Flop Circuit

 

  • Firstly, we use the toggle flip flop in control circuits.
  • Secondly, the clock pulse is sound in frequency dividers.
  • Also, we can use these types of flip flops in storage registers
  • Moreover, we can use them in digital counters.
  • Lastly, these types of flip flops have a clock pulse that we use in shift registers.

  an electrician working on a controlled circuit

(an electrician working on a controlled circuit.)

 

6. Set-Reset Flip Flop vs. J-K Flip Flop

 

  • In SR, the input combination is set to 1, and the circuit current input signal produces an invalid output signal. However, in JK, there are no weak current outputs even if J and K are both set to 1.
  • The indeterminate state occurs in SR but not in JK. On the other hand, the present state toggles in a JK.

 

Summary

 

A JK flip flop system is a standard synchronous system that is useful in many devices. They're straightforward to use and understand!

We hope you learned how a JK flip flop operates as well as its uses in your daily life! If you have any further questions, please let us know. We would love to help.